Sourcing Guide
How We Evaluate Semiconductor Experts
For recruiters, talent partners, and clients
What This Role Is (and Isn’t)
This Role IS
- AI accelerator architecture and design
- Hardware-software co-design for ML workloads
- Fabrication process expertise for AI chips
- Performance optimization for training infrastructure
- Chip packaging and integration consulting
This Role IS NOT
- General electrical engineering
- Software-only ML engineering
- IT infrastructure or data center ops
- Academic research with no industry application
- Sales or business development for chip companies
Where to Find Candidates
Target Companies (APAC)
- Taiwan: TSMC, MediaTek, Realtek, Novatek, Global Unichip — design and fab teams
- Korea: Samsung Semiconductor, SK Hynix, LX Semicon
- Singapore: Broadcom, Marvell, Dyson APAC R&D
- AI chip startups: Graphcore, Cerebras, Tenstorrent, Hailo — APAC engineering teams
- Cloud AI hardware: Google TPU, AWS Trainium/Inferentia, Meta MTIA teams in APAC
Screening Criteria
Dimension
1 — Weak
3 — Good
5 — Exceptional
Semiconductor Depth
Theoretical knowledge only. No fab or design experience.
Has worked in chip design or fab. Understands process nodes, packaging.
Led chip design projects. Deep fab process expertise. Multi-node experience.
AI Hardware
No AI context. Traditional chip background only.
Understands GPU/TPU architecture. Familiar with AI training workloads.
Designed AI accelerators. Hardware-software co-design. Training optimization.
Technical Tools
Limited tool experience.
EDA tools (Cadence, Synopsys). Verilog/VHDL. Simulation.
Full design flow. Custom tool development. Advanced verification.
Industry Network
Isolated. No industry connections.
Active in semiconductor community. Conference presence.
Deep TSMC/Samsung relationships. Can open doors for partnerships.
Startup Fit
Large-company mentality. Needs large teams.
Can work independently. Comfortable with limited resources.
Has built semiconductor functions at startups. Resourceful.
Interview Process
Step 1: Resume Screen (5 min)
- Semiconductor design or fab experience
- AI hardware context (GPU, TPU, ASIC for ML)
- APAC-based (ideally Taiwan, Korea, Singapore)
Step 2: Technical Screen (45 min)
- “Walk me through a chip design project you led or contributed to.”
- “How would you approach designing an AI accelerator for transformer training?”